ISSCC 2008 / SESSION 30 / DATA - CONVERTER TECHNIQUES / 30 . 8 30 . 8 A 6 b 0 . 2 - to - 0 . 9 V Highly Digital Flash ADC with Comparator Redundancy
نویسندگان
چکیده
Microsensor wireless networks and implanted biomedical devices have emerged as exciting new application domains. These applications are highly energy constrained and require flexible, integrated, energy-efficient ADC modules that can ideally operate at the same supply voltage as digital circuits. In many applications, the performance requirements are quite modest (100s kS/s). This paper presents a highly digital ADC architecture compatible with advanced CMOS processes, capable of operating down to a supply voltage of 200mV (i.e., subthreshold regime) and up to 900mV. However, leakage and device variation must be addressed, particularly at low supply voltages.
منابع مشابه
Linköping University Post Print A 6‐bit 2.5‐GS/s Flash ADC using Comparator Redundancy for Low Power in 90nm CMOS
A 2.5 GS/s flash ADC, fabricated in 90nm CMOS utilizes comparator redundancy to avoid traditional power, speed and accuracy trade-offs. The redundancy removes the need to control comparator offsets, allowing the large process-variation induced mismatch of small devices in nanometer technologies. This enables the use of small-sized, ultra-low-power comparators with clock-gating capabilities in o...
متن کاملIsscc 93 / Session 4 / Data Comversion / Paper Wp 4.2 Wp 4.2: a 15b 1mds Digitally Self-calibrated Pipeline Adc'
Unlike analog calibration, digital calibration alone does not correct or create analog decision levels. Therefore, the uncalibrated ADC must provide decision levels spaced no greater than lLSB at the intended resolution. In lb/stage pipeline ADCs with nominal gain of 2, missing decision levels result when the input of any stage exceeds full scale due to capacitor mismatch, capacitor non-lineari...
متن کاملISSCC 2009 / SESSION 4 / HIGH - SPEED DATA CONVERTERS / 4 . 4 4 . 4 A 5 b 800 MS / s 2 mW Asynchronous Binary - Search ADC in 65 nm CMOS
Digital wireless communication applications such as UWB and WPAN necessitate low-power high-speed ADCs to convert RF/IF signals into digital form for subsequent baseband processing. Considering latency and conversion speed, flash ADCs are often the most preferred option. Generally, flash ADCs suffer from high power consumption and large area overhead. On the contrary, SAR ADCs have low power di...
متن کاملAn 8-b 650-MHz Folding ADC
An 8-b 650-MHz folding analog-to-digital converter (ADC) with analog error correction in the comparators is presented. With an input frequency of 150 MHz, 7.8 effective bits are obtained. The ADC is implemented in a 1-pm 13-GHz triple-level interconnect bipolar process, requiring 850 mW from a single -4.5-V supply. The die size is 4.2 mm’.
متن کاملISSCC 2007 / SESSION 25 / NYQUIST ADC TECHNIQUES / 25 . 5 25 . 5 A Zero - Crossing - Based 8 b 200 MS / s Pipelined ADC
Comparator-based switched-capacitor (CBSC) circuits were introduced in [1] as an alternative to opamp-based designs to overcome the limitations of opamps due to device and voltage scaling. Reduced device gain and signal swing make it increasingly difficult to design high-gain high-speed feedback loops with opamps. CBSC circuits replace the opamp with a comparator and a current source (see U1 an...
متن کامل